Memory + Interfaces
LPDDR3 DRAM
Bringing next-generation, low-power performance to the market today, our R+ LPDDR3 DRAM improves power consumption and performance in smartphones and tablets while maintaining compatibility with existing LPDDR3 and LPDDR3e specifications. When paired with the R+ LPDDR3 PHY, the DRAM supports data rates of up to 2133 Mbps, while providing an active power reduction of up to 30% when compared to a standards-only LPDDR3 device at the same speed.
How LPDDR3 DRAM works
Today’s smartphones and tablets demand longer battery life combined with increased memory bandwidth to support popular high-performance applications such as HD video capture and content streaming. The R+ LPDDR3 DRAM delivers the level performance and power efficiency combined with the standard compatibility required for mobile device makers to meet and exceed growing consumer expectations.
Compatible with LPDDR3, LPDDR3e and enhanced R+ LPDDR3, our R+ LPDDR3 DRAM supports data rates up to 2133 Mbps at up to 30% lower DRAM active power (IDD4R) versus standard LPDDR3 when paired with our R+ LPDDR3 PHY. The improvement in power consumption is due in part to the use of Low Voltage Swing Terminated Logic (LVSTL) signaling technology, which features a significantly reduced signal swing versus the 1.2 volt HSUL (High Speed Unterminated Logic) signal swing of LPDDR3. By supporting both signaling types, the R+ LPDDR3 DRAM offers an enhanced performance, low-power mode while maintaining compliance with LPDDR3e and LPDDR3 standards and specifications.
Solution Offerings
- Fully-compliant with industry standard LPDDR3e and LPDDR3
- Compatible with standard LPDDR3 controller PHYs. No memory controller changes required
- Scalable architecture supports data rates up to 2133 Mbps and 8.5 GB/sec bandwidth per channel
- Flexible packaging options (POP, MCP, FBGA)
- Full compatibility to LPDDR3e/LPDDR3 low-power states
- Support data path widths of 16 and 32 bits
- DRAM densities from 4Gb to 32Gb
- Dual rank support
- Up to 30% lower DRAM active power
- LVSTL enhanced signaling mode available to enable data rates of 2133 Mbps and beyond with no system hardware changes required
- Up to 25% lower active memory system power
- Deep Power-down support
- Refresh, self-refresh, and partial array self-refresh support
- On-die programmable VrefDQ generation
- Programmable output impedance, on-die termination, and periodic ZQ calibration
- CA eye training, DQS write leveling and DQ read calibration support
- On-Die-Termination support
Memory Suppliers/Manufacturers
- Complete specification and implementation package
- Reference design database including schematics and matching layout
- Integration guidelines
- Package and PCB design guidelines
- Logic and power simulations
- Timing verification environment
- Device characterization and test environment
- Optional design integration and bring-up support services
SOC/ASIC Developers
- Contact LPDDR3 memory supplier for datasheet, roadmap, schedule, and pricing
Operating Modes
| Feature | LPDDR3 | LPDDR3e | Rambus LPDDR3 |
|---|---|---|---|
| Signaling | HSUL | HSUL | HSUL/LVSTL |
| Max Data Rate (Mbps) | 1600 | 2133 | 2133 |
| Density | 4/8/16/32 | 4/8/16/32 | 4/8/16/32 |
| Data Path Width | X16/x32 | X16/x32 | X16/x32 |
| VDD1/VDD2/VDDQ (V) | 1.8/1.2/1.2 | 1.8/1.2/1.2 | 1.8/1.2/1.2 |
| Rank Support | 2 | 2 | 2 |
| Package | POP, MCP, FBGA | POP, MCP, FBGA | POP, MCP, FBGA |
