Traditional industry-standard memory architectures use wide, single-ended command/address (C/A) channels that operate at a considerably lower frequency than the data rate of the system. These wide, multi-drop interfaces require more pins and have greater power requirements. Given the pin and area requirements, scaling of wide busses becomes increasingly impractical. FlexLink™ C/A interface is a full-speed, differential, point-to-point C/A interface technology that provides flexible access granularity and scalable capacity. Using this innovation, the C/A channel can be implemented with as a little as two wires per DRAM device, reducing area, power, pin count, and overall system costs.
- Provides capacity and access granularity scalability at reduced system costs
- Reduces area, power and pin count on DRAM and controller interfaces
- Enables memory system operation up to 20Gbps
What is FlexLink C/A Interface Technology?
The industry’s first full-speed, scalable point-to-point command/address channel, FlexLink C/A provides the command and address information to a DRAM using a single, differential high speed communications channel. Unlike wide, single-ended C/A channels, narrow FlexLink C/A channels operating at the full-speed of the data, provide a straightforward path for scaling of capacity and access granularity.
An example is a memory system using four independent FlexLink C/A channels and 32 data (DQ) links supporting 32-byte access granularity. Such a system can support one, two or four DRAM devices, allowing for scaling of capacity while maintaining system bandwidth and 32-byte access granularity. Similarly, the FlexLink C/A interface supports scalable access granularity by increasing the number of C/A links per DRAM. For example, a controller attached to a single DRAM through one, two or four independent C/A channels and 32 DQ links would support 128-, 64- or 32-byte access granularity, respectively.
Who Benefits?
FlexLink C/A interface technology enables memory systems operating at up to 20Gbps and providing upwards of a terabyte per second of bandwidth. It minimizes the controller area and number of pins required to implement the C/A channels. With lower pin counts, and lower voltages thanks to differential signaling, FlexLink C/A reduces overall interface power and costs for DRAM and controller designers. Given the robust signaling characteristics of differential signaling, FlexLink C/A increase system reliability. In addition, FlexLink C/A provides designers great flexibility through a straightforward means to scale memory system capacity and access granularity.
