Rambus has added an On-chip Noise Monitor to its suite of tools and IP cores.
According to Loren Shalinsky, a Strategic Development Director at Rambus, the Noise Monitor is designed to accurately characterize power supply noise of low- power, high-performance complex IPs and electronic systems.
“The compact, embedded IP block provides a better understanding of the effects of noise on circuit performance versus conventional hand-probing methods, making it ideal for integrated package-on-package (PoP) and 2.5/3D packages,” Shalinsky explained.
“Hand-probing outside the chip package often misses high-frequency noise that is filtered out by the package. In addition, hand-probing is slow, error-prone and often difficult or impossible to perform close to the point of interest.”
In contrast, says Shalinsky, the Rambus Noise Monitor improves the quality of results by accurately capturing multiple noise components – including those well above the package resonance frequency.
“More specifically, the Noise Monitor uses sampled measurements combined with post-processing to measure noise in both the time and frequency domains,” he continued.
“The Noise Monitor also includes a generator that provides a controllable noise source that operates over a wide range of frequencies and amplitudes for more robust characterization capabilities.”
Indeed, the generator can be employed together with noise and jitter measurements to extract power distribution network impedance (ZPDN) and power supply noise induced jitter (PSIJ) sensitivity. Plus, LabStation™ software is included to facilitate fully automated measurements, post-processing and data visualization.
Additional features include:
- Available for TSMC40G/LP and GF28HPP/SLP fabrication processes
- IJTAG-compatible for easy integration
- Voltage support for thin- and medium-oxide thickness devices
- Universal layout compatible with North-South and East-West orientations
- Voltage resolution: 200μV/LSB
- Frequency resolution: 1MHz
- Effective Measurement BW: Up to 3-6GHz
It should be noted that Rambus will demonstrate the On-chip Noise Monitor along with its R+™ enhanced standard memory and serial link cores at the upcoming DesignCon 2015 conference in booth 835, January 28-29, 2015.
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