PCIe 7.0 Switch

The Rambus PCI Express® (PCIe®) 7.0 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC and FPGA implementations. It enables the connection of one upstream port and multiple downstream ports as a fully configurable interface subsystem. It is backward compatible to PCIe 5.0.

How the PCIe 7.0 Switch Works

The PCIe 7.0 Switch is the first embedded PCIe 7.0 switch IP available on the market and enables designers to use fewer PCIe PHYs, saving latency, power consumption and bill-of-material costs. The PCIe switch IP transparently manages upstream-downstream data flow as well as peer-to-peer transfers between downstream ports, delivering the flexibility, scalability and configurability required for connecting multiple devices, including NVMe SSDs.
PCIe 7.0 Switch Block Diagram
PCIe 7.0 Switch Block Diagram

Data Center Evolution: The Leap to 64 GT/s Signaling with PCI Express 6.1

Download our white paper: Data Center Evolution: The Leap to 64 GT/s Signaling with PCI Express 6.1

The PCI Express® (PCIe®) interface is the critical backbone that moves data at high bandwidth and low latency between various compute nodes such as CPUs, GPUs, FPGAs, and workload-specific accelerators. With the rapid rise in bandwidth demands of advanced workloads such as AI/ML training, PCIe 6.1 jumps signaling to 64 GT/s with some of the biggest changes yet in the standard.

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