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DDR4 Multi-modal PHY

Rambus and Mobiveil Partner to Bring Pre-Validated Solution to Chip Makers, Delivering Memory Flexibility and Accelerated Time-to-Market

Certified interoperability of DDR4/3, LPDDR3/2 Multi-modal PHY and Universal controller combines industry-leading signal integrity and broad configurability

SUNNYVALE and MILPITAS, Calif. – November 18, 2014 – Rambus Inc. (NASDAQ:RMBS) and Mobiveil today announced they have validated interoperability of the Rambus R+™ DDR4 Multi-modal PHY with the Mobiveil Universal Multiport Memory Controller (UMMC) Core for JEDEC standard DDR4/3 and LPDDR3/2 operation. As part of the overall Rambus IP Cores program, the integrated IP provides chipmakers with a pre-validated, industry standard solution that reduces costs and risk by reducing IP qualification time. In addition, the differentiated memory subsystem brings together the superior signal integrity and low power offered by the Rambus R+ multi-modal PHY with the flexibility of the Mobiveil UMMC in a single, easily integrated solution.

“Partnering with Mobiveil to bring a complete offering to market demonstrates both companies’ commitment to meeting customer needs in the face of increasingly complex and costly SoC development,” said Kevin Donnelly, general manager of the Memory and Interface division at Rambus. “By working in a collaborative manner with companies like Mobiveil, we are addressing chip makers needs with proven and ready-to-use IP blocks that minimize qualification and integration time.”

“Our UMMC Controller Core has successfully proven to be both flexible and configurable for real-time consumer applications,” said Ravi Thummarukudy, chief executive officer of Mobiveil. “Pairing our technology with the Rambus R+ multi-modal PHY provides customers with the best DRAM solution for their particular application without changing the SoC, which substantially minimizes design time and development cycles across a broad number of applications.”

The Rambus R+ DDR4/3, LPDDR3/2 multi-modal PHY delivers industry-leading performance while providing SoC makers a comprehensive array of memory choices, ranging from high-performance to low-power applications. To complement its broad applicability, the R+ DDR4/3 multi-modal PHY delivers versatile configuration options for both area- and power-optimized consumer applications and performance-intensive compute applications. Additionally, the enhanced standards IP cores are designed with system-aware methodology to ensure superior signal integrity and system margin for optimal DRAM vendor interoperability. The PHY is available in several low-power foundry processes and can be configured for both flip-chip and wire bond packages with data rates ranging from 800 to 3200Mbps.

Mobiveil’s UMMC Controller is a highly flexible and configurable design. It is targeted for high bandwidth access and low power consumption such as next-generation mobile, networking and consumer applications. The controller architecture is carefully tailored to achieve reliable high-frequency operation with dynamic power management and rapid system debug capabilities. Its flexible AXI System interface makes it easy to be integrated into a wide range of applications.

Mobiveil has joined the Rambus Partner Program, which will enable further collaboration on other combined IP blocks offerings between the two companies. For additional information on the Rambus Partner Program, visit rambus.com/partners.

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About Rambus Inc.

Rambus brings invention to market. Our customizable IP cores, architecture licenses, tools, services, and training improve the competitive advantage of our customer’s products while accelerating their time-to-market. Rambus products and innovations capture, secure and move data. For more information, visit rambus.com.

About Mobiveil, Inc.

Mobiveil is a fast‐growing technology company that specializes in development of Silicon Intellectual Properties, platforms and solutions for the storage, networking and enterprise markets. Mobiveil team leverages decades of experience in delivering high‐quality, production‐proven, highspeed serial interconnect Silicon IP cores and custom and standard form factor hardware boards to leading customers worldwide.. Mobiveil is headquartered in the Silicon Valley with engineering development centers located in Milpitas, CA, Chennai and Bangalore, India, and sales offices and representatives located in US, Europe, Israel, Japan, Taiwan and People Republic of China. For more information, please visit www.mobiveil.com

Rambus and Northwest Logic Certify Interoperability of DDR4/3 PHY and Controller

Integrated IP block achieves both high-performance and efficiency; tested and validated system-level design provides superior signal integrity and reliability

SUNNYVALE, Calif. and BEAVERTON, Ore. – August 26, 2014 – Rambus Inc. (NASDAQ:RMBS) and Northwest Logic today announced they have validated interoperability of the Rambus R+™ DDR4/3 PHY with the Northwest Logic DDR4/3 SDRAM Controller Core. The combined solution provides customers with a differentiated memory subsystem that brings together the superior signal integrity offered by the Rambus R+ PHY along with the robust Northwest Logic controller core for a proven and easy-to-integrate solution.

“Given the industry’s ongoing demand for higher memory performance to manage greater amounts of data, this integrated solution provides customers with an easy way to integrate a tested and validated PHY/controller combination, ideal for networking, computing, and consumer applications requiring the best possible performance,” said Kevin Donnelly, general manager of the Memory and Interface division at Rambus. “We look forward to continuing our partnership with Northwest Logic and ongoing collaboration between our companies.”

“Our DDR4/3 SDRAM Controller Core has been successfully deployed in a wide variety of customer systems demonstrating high reliability and performance,” said Brian Daellenbach, president of Northwest Logic. “We are excited to offer a complete DDR4/3 solution with Rambus ensuring our customers achieve the best possible combined memory solution for their high data demands.”

The Rambus R+ DDR4/3 PHY enables customers to differentiate their offerings by providing industry-leading performance while maintaining full compatibility with industry-standard DDR4 and DDR3 interfaces. The R+ DDR4/3 PHY delivers versatile configuration options for both area- and power-optimized consumer applications and performance-intensive compute applications. The PHY is available in several low-power foundry processes and can be configured for both flip-chip and wire bond packages with data rates ranging from 800 to 3200Mbps.

The Northwest Logic DDR4/3 SDRAM Controller Cores are part of a family of silicon-proven, high-performance, easy-to-use memory controller cores that provide support for DDR4/3/2/1 LPDDR4/3/2/1, HBM, MRAM, RLDRAM 3/II. In addition, the Northwest Logic DDR4/3 SDRAM Controller Core provides high bus efficiency using request reordering, bank management and look-ahead processing. Northwest Logic also provides AXI/AHB bus interface, Error Correction Code (ECC), Read-Modify-Write and Multi-Port Front-End add-on cores to further simplify user designs. These cores support the highest memory clock rates, require minimal gate count and, as part of the solution, Northwest Logic offers a complete Memory Test Package for validation.

Northwest Logic has joined the Rambus Partner Program, which will enable further collaboration on other combined IP blocks offerings between the two companies. For additional information on the Rambus Partner Program, visit rambus.com/partners.

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Company website: rambus.com
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About Rambus Inc.

Rambus brings invention to market. Our customizable IP cores, architecture licenses, tools, services, and training improve the competitive advantage of our customer’s products while accelerating their time-to-market. Rambus products and innovations capture, secure and move data. For more information, visit rambus.com.

About Northwest Logic

Northwest Logic, founded in 1995 and located in Beaverton, Oregon, provides high-performance, silicon-proven, easy-to-use IP cores including high-performance PCI Express solution (PCI Express 3.0, 2.1 and 1.1 cores and drivers), Memory Interface Solution (DDR4/3/2, LPDDR4/3/2 SDRAM; HBM, MRAM, RLDRAM 3/II), and MIPI Solution (CSI-2, DSI). These solutions support a full range of platforms including ASICs, Structured ASICs and FPGAs. For additional information, visit www.nwlogic.com.

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