2017-2016

The seminar, presented live in Tokyo and Shanghai, will showcase a complete FinFET HBM2 supply chain solution

Tokyo, Japan and Shanghai, China — November 16, 2017 — Samsung Electronics, ASE Group, eSilicon, Rambus and Northwest Logic have joined forces to offer a complete FinFET-based high-bandwidth memory (HBM) supply chain solution. HBM2 is a JEDEC-defined standard that utilizes 2.5D technology to interconnect an SoC with an HBM memory stack. HBM2 is being used in very high-bandwidth applications. This seminar will present a complete FinFET-based supply chain that leverages advanced IP and 2.5D technology to deliver customer designs now.

The live, in-person seminar, “14nm 2.5D/HBM2/SerDes Alliance for High-Performance Networking, Computing, Deep Learning and 5G Infrastructure,” will be held in Tokyo on 11 December and in Shanghai on 14 December. The event is free, but registration is required by 18:00 on 5 December. Agenda:

10:30 Check in and networking

11:00 Samsung, HBM2 memory solution

11:30 Samsung, Foundry solution including 14nm FinFET technology

12:00 ASE, advanced 2.5D packaging

12:30 Lunch

13:30 eSilicon, ASIC and 2.5D design and implementation, HBM2 PHY, high-speed memories

14:00 Rambus, high-performance SerDes

14:30 Northwest Logic, HBM2 controller

15:00 Networking cocktail reception and lucky draws

“ASE works closely with our customers to implement HBM into their high-performance products from the early stages of development through the final product launch. We look forward to sharing our expertise in these key areas as new products come to market,” said CP Hung, VP of corporate R&D, ASE Group.

“eSilicon is currently in production with HBM customer chips using its HBM2 PHY and advanced ASIC design and packaging capabilities for high-performance networking and AI,” said Hugh Durdan, eSilicon’s vice president of strategy and products. “We’ve been doing R&D in 2.5D since 2011—it’s gratifying to have these complex ASICs become real.”

“With nearly 30 years of high-speed interface design experience, Rambus develops advanced SerDes and memory IP cores that solve the power, performance and capacity challenges of communications, networking and data center markets,” said Mohit Gupta, senior director product marketing at Rambus. “By working together with other leaders in the IP ecosystem to share our expertise at seminars such as these, we are excited to help our customers bring high-quality, comprehensive solutions to the market.”

“Northwest Logic’s highly configurable HBM2 controller is being used in a wide range of high-performance HBM2 applications. This seminar provides a great opportunity to quickly get up to speed on HBM2 and learn how it can be used to create highly differentiated products in high-performance applications,” said Brian Daellenbach, president of Northwest Logic.

Registration is open and details are available on the 14nm 2.5D/HBM2/SerDes Alliance seminar page.

About Samsung Electronics Co., Ltd.
Samsung inspires the world and shapes the future with transformative ideas and technologies. The company is redefining the worlds of TVs, smartphones, wearable devices, tablets, digital appliances, network systems, and memory, system LSI and Foundry. For the latest news, please visit the Samsung Newsroom at http://news.samsung.com

About ASE Group
The ASE Group is among the leading providers of independent semiconductor manufacturing services in assembly, test, materials and design manufacturing. As a global leader geared towards meeting the industry’s ever growing needs for faster, smaller and higher performance chips, the Group develops and offers a wide portfolio of technology and solutions including IC test program design, front-end engineering test, wafer probe, wafer bump, substrate design and supply, wafer level package, flip chip, system-in-package, final test and electronic manufacturing services through USI Inc and its subsidiaries, members of the ASE Group. For more information about the ASE Group, visit www.aseglobal.com or twitter @asegroup_global.

About eSilicon
eSilicon is an independent provider of complex FinFET-class ASIC design, custom IP and advanced 2.5D packaging solutions. Our ASIC+IP synergies include complete, silicon-proven 2.5D/HBM2 and TCAM platforms for FinFET technology at 14/16nm. Supported by patented knowledge base and optimization technology, eSilicon delivers a transparent, collaborative, flexible customer experience to serve the high-bandwidth networking, high-performance computing, artificial intelligence (AI) and 5G infrastructure markets.

About Rambus
Rambus creates innovative hardware and software technologies, driving advancements from the data center to the mobile edge. Our chips, customizable IP cores, architecture licenses, tools, software, services, training and innovations improve the competitive advantage of our customers. We collaborate with the industry, partnering with leading ASIC and SoC designers, foundries, IP developers, EDA companies and validation labs. Our products are integrated into tens of billions of devices and systems, powering and securing diverse applications, including Big Data, Internet of Things (IoT), mobile payments, and smart ticketing. At Rambus, we are makers of better. For more information, visit rambus.com.

About Northwest Logic
Northwest Logic, founded in 1995 and located in Beaverton, Oregon, provides high-performance, silicon-proven, easy-to-use IP cores including high-performance PCI Express Solution (PCI Express 4.0/3.0/2.1/1.1 cores, DMA cores and drivers), Memory Interface Solution (HBM2, DDR4/3, LPDDR4/3, MRAM), and MIPI Solution (CSI-2, DSI-2, DSI). These solutions support a full range of platforms including ASICs, Structured ASICs and FPGAs.

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eSilicon is a registered trademark, and the eSilicon logo is a trademark, of eSilicon Corporation. Other trademarks are the property of their respective owners.

Contacts:
Sally Slemons	Susan Cain
eSilicon Corporation	Cain Communications
408-635-6409	408-393-4794
[email protected]	[email protected]

 

 

Beaverton, Oregon – October 17, 2017

Fujisoft, a Northwest Logic representative in Japan, will be showcasing Northwest Logic’s products at the Embedded/IoT Technology 2017 conference. The conference runs from Nov 15-17 at the Pacifico Yokohama Exhibition Hall A. For more information on the conference, contact Fujisoft or Northwest Logic for more information on Northwest Logic’s products.

About Northwest Logic
Northwest Logic, founded in 1995 and located in Beaverton, Oregon, provides high-performance, silicon-proven, easy-to-use IP cores including high-performance PCI Express Solution (PCI Express 4.0/3.0/2.1/1.1 cores, DMA cores and drivers), Memory Interface Solution (HBM2, DDR4/3, LPDDR4/3, MRAM), and MIPI Solution (CSI-2, DSI-2, DSI). These solutions support a full range of platforms including ASICs, Structured ASICs and FPGAs. For additional information, visit www.nwlogic.com.

PCI-SIG, PCI Express, PCIe, PCI-X and PCI are all trademarks or registered trademarks of PCI-SIG. All trademarks are the property of their respective holder.

About Fujisoft
Fujisoft was established in 1970, has offered design services, research, validation, and production support. Fujisoft group with 10,000 employees is an industry leader in embedded system development. Fujisoft utilizes state-of-the art embedded technology to solve customer all design requirements. For more detail information, please visit https://www.fsi-embedded.jp/en/.

For more information contact:
Vinitha Seevaratnam
Northwest Logic
(503) 533-5800 x308
www.nwlogic.com

Takuo Izumi
Fujisoft Incorporated
+81 (50) 3000-2102
http://www.fsi.co.jp

Mentor Graphics, Northwest Logic, and Krivi Semiconductor Announce Availability of Complete DDR4 SDRAM IP Design and Verification Solution

WILSONVILLE, Ore., October 5, 2016 – Mentor Graphics® Corporation (NASDAQ: MENT), Northwest Logic and Krivi Semiconductor

today announced the availability of a complete DDR4 SDRAM IP design and verification solution that enables ASIC and FPGA design teams to quickly design and verify DDR4 memory subsystems in the Mentor Graphics IP Partnership Program. Together, Mentor Graphics, Northwest Logic, and Krivi Semiconductor enable customers to reduce time-to-market by a factor of 2X by integrating complementary design and verification IP into a single flow. Northwest Logic provides silicon-proven, high-performance, easy-to-use memory controller design IP for use in both ASICs and FPGAs along with a comprehensive set of add-on cores, while Krivi Semiconductor offers state-of-the-art DDR PHY with DFI compatibility and minimum integration overhead. Mentor Graphics supplies a comprehensive, configurable, ready-to-go verification IP tool suite for memory controllers and interfaces.

The Mentor Graphics IP Partnership Program provides a complete ecosystem enabling rapid integration of design and verification IP for ASIC and FPGA design teams. By enabling early access to design IP from leading suppliers by Mentor Graphics, and reciprocal early access to Mentor Graphics’ Questa® Verification IP (QVIP) by leading design IP suppliers, the program provides high performance, high quality, pre-validated design IP, and pre-configured, easy-to-use, ready-to-go verification IP. As a result, SoC project teams can cut their IP design and verification time in half.

“The partnership between independent design IP and verification IP suppliers ensures unbiased validation,” said Mark Olen, Mentor Graphics product marketing group manager. “Working with Northwest Logic and Krivi Semiconductor enables our mutual ASIC and FPGA customers to integrate their DDR4 SDRAM design IP in half the time, while providing the highest levels of impartial verification quality.”

Northwest Logic provides its high-performance, high-quality, easy-to-use “To the Point Solutions” through a combination of design IP and services. “Our DDR4 SDRAM Controller Core is designed for use in applications requiring high memory throughput, high clock rates and full programmability,” said Brian Daellenbach, President of Northwest Logic. “By working with Krivi Semiconductor and Mentor Graphics, our customers have access to a complete DDR4 PHY, controller, and advanced verification solution.”

Krivi Semiconductor offers state-of-the-art DDR PHY with DFI compatibility and minimum integration overhead. “We have exhaustively validated our Multi-DDR PHY solution using Mentor Graphics DDR Questa VIP,” said Gyan Prakash, CTO. “We are pleased to work with memory controller vendors such as Northwest Logic, and become part of Mentor’s IP/VIP ecosystem.”

Mentor Graphics’ QVIP library provides engineers with standard UVM SystemVerilog components using a common architecture across a wide range of protocols, including DDR4 SDRAM memory. Test plans, compliance tests, test sequences, and protocol coverage are all included in source code format, allowing easy re-use, customization, and debug. The QVIP components also include a comprehensive set of protocol checks, error injection, and debug capabilities.

About Krivi Semiconductors

Krivi Semiconductor is a specialized company in DDR PHY, IO pad libraries and Analog clocking IPs. Krivi offers highest performance DDR PHY in smallest area and power besides offering friendly SoC integration. The highly motivated engineering team at Krivi takes advantage of decades of successful high volume IP creation experience to bring best-in-class AMS and wired interconnect PHY IP products. For more information about Krivi visit www.krivisemi.com

About Northwest Logic

Northwest Logic’s mission since being founded in 1995, is to provide high-performance, high-quality, easy-to-use “To the Point Solutions” using a combination of IP Cores and design services. Northwest Logic’s IP cores include high-performance PCI Express solution (PCI Express 4.0/3.0/2.1/1.1 cores and DMA cores and drivers), Memory Interface solution (HBM, MRAM, DDR4/3/2/1, LPDDR4/3/2/1, RLDRAM 3/II, and MIPI Solution (CSI-2, DSI/DSI-2). These solutions support a full range of platforms including ASICs, Structured ASICs, and FPGAs. For more information about Northwest Logic visit www.nwlogic.com.

(Mentor Graphics and Questa are registered trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.)

For More Information:
Laura Parker
[email protected]
Mentor Graphics
503.685.1775

ABOUT MENTOR GRAPHICS

Mentor Graphics Corporation is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronic, semiconductor and systems companies. Established in 1981, the company reported revenues in the last fiscal year of approximately $1.18 billion. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/.

Integrated HBM2 PHY and Memory Controller provide validated, standards-compliant memory subsystem with superior signal integrity and reliability

SUNNYVALE, Calif. – Aug. 28, 2017 – Rambus Inc. (NASDAQ: RMBS), an innovator in semiconductor and IP products, today announced validated interoperability between its HBM2 PHY and Northwest Logics’ HBM2 Memory Controller Core. The solution builds on the growing ecosystem of Rambus partner products that interoperate with its latest HBM2 PHY IP core. The combined HBM2 solution is designed to support high-performance networking and server applications in the data center and communications markets that require the maximum amount of bandwidth available through HBM2.

“Our work with Northwest Logic gives Rambus the functionality to provide a verified solution that reduces the engineering workload and time to market for chip designers” said Luc Seraphin, senior vice president and general manager of the Rambus Memory and Interfaces Division. “As Rambus extends its footprint in PHY support for leading-edge technologies, collaborative interoperability is essential for our end customers that demand early adoption. Memory interfaces are increasingly important in today’s new workloads, and the combination of Rambus HBM2 and Northwest Logic’ HBM2 Memory Controller core is a natural fit to support customer demands on both sides.”

The Northwest Logic HBM2 Memory Controller Cores are optimized for use in both ASICs and FPGAs, and support full-rate, half-rate and quarter-rate operations. The cores provide a solution that can be configured to exact customer requirements, are silicon-proven and are verified with the Rambus HBM2 PHY.

“Our HBM2 Memory Controller Core has been successfully deployed in a wide variety of customer systems demonstrating high reliability and performance,” said Brian Daellenbach, president of Northwest Logic. “We are excited to offer a complete HBM2 solution with Rambus ensuring our customers achieve the best possible combined memory solution for their high data demands.”

The Rambus HBM2 PHY and Northwest Logic HBM2 Memory Controller are each fully JEDEC compliant to the HBM2 standard, allowing the PHY and memory controller to interoperate. The Rambus HBM2 PHY is a high-performance memory IP core that features reduced power consumption and a small form factor. It combines 2.5D packaging with a wider interface at a lower clock speed, delivering higher efficiency and lower power consumption compared to other memory solutions on the market. For additional information on Rambus HBM2 PHY solutions, please visit https://www.rambus.com/memory-and-interfaces/ddrn-phys/hbm/

Follow Rambus:
Company website: rambus.com
Rambus blog: rambusblog.com
Twitter: @rambusinc
LinkedIn: www.linkedin.com/company/rambus
Facebook: www.facebook.com/RambusInc 

About Rambus Memory and Interfaces Division 
The Rambus Memory and Interfaces Division develops products and services that solve the power, performance, and capacity challenges of the communications and data center computing markets. Rambus enhanced standards-compatible and custom memory and serial link solutions include chips, architectures, memory and SerDes interfaces, IP validation tools, and system and IC design services. Developed through our system-aware design methodology, Rambus products deliver improved time-to-market and first-time-right quality.

About Rambus Inc.

Rambus creates innovative hardware and software technologies, driving advancements from the data center to the mobile edge. Our chips, customizable IP cores, architecture licenses, tools, software, services, training and innovations improve the competitive advantage of our customers. We collaborate with the industry, partnering with leading ASIC and SoC designers, foundries, IP developers, EDA companies and validation labs. Our products are integrated into tens of billions of devices and systems, powering and securing diverse applications, including Big Data, Internet of Things (IoT), mobile payments, and smart ticketing. At Rambus, we are makers of better. For more information, visit rambus.com. 

Press Contact:

Leslie Clavin
SHIFT Communications
(415) 591-8440

[email protected]

Focus on SOC Designs for Machine Learning, Computer Vision, UHD Video Processing, and Enterprise SSD Applications

San Jose, Calif. – May 9, 2017 – Sonics, Inc., the world’s foremost supplier of Network On-Chip (NoC) and power management technologies and services and Northwest Logic, a leading provider of high performance IP cores, today announced their partnership to deliver high throughput memory subsystem solutions for complex System-On-Chip (SOC) designs. The companies’ partnership, which is being driven by a mutual customer SOC design win, integrates Sonics’ flagship interconnect fabric, SonicsGN® NoC, and Sonics’ MemMax® memory scheduler with Northwest Logic’s family of HBM2, DDRx, LPDDRx memory controllers.
“As DRAM data rates increase, the number of pipelined outstanding transactions required to achieve full throughput grows dramatically,” said Drew Wingard, CTO of Sonics. “This requires more intelligent transaction scheduling that considers both the bandwidth and latency requirements of pending requests and the page and bank states of DRAM. Without careful coordination between the NoC, memory scheduler, and memory controller, the subsystem will miss data transfer deadlines and suffer performance degradation at several points along the memory subsystem transaction path. Our partnership with Northwest Logic ensures that MemMax’s scheduling decisions produce a transaction stream enabling Northwest Logic’s controllers to efficiently map into memory commands that fully leverage the customer’s chosen DRAM technology.”

“Northwest Logic and Sonics share an uncompromising commitment to customer success,” said Brian Daellenbach, President of Northwest Logic. “We are seeing a significant uptick in demand for high throughput memory subsystems that address data-intensive applications and markets such as Machine Learning, Computer Vision, UHD Video Processing, and Enterprise SSD. Our memory controllers have a strong industry reputation for delivering high-performance, high quality, and ease-of-use. Our partnership with Sonics enables us to provide our mutual customers with a complete memory subsystem solution that also takes into account the need for high performance NoCs that support multi-channel memory subsystem architectures and integrate all of the cores in the system.”

The Sonics-Northwest Logic high throughput memory subsystem solutions are currently in use with leading SOC design customers and available immediately. For more information, contact your Sonics or Northwest Logic representative.

About Northwest Logic
Northwest Logic, founded in 1995 and located in Beaverton, Oregon, provides high-performance, silicon-proven, easy-to-use IP cores including high-performance PCI Express Solution (PCI Express 4.0/3.0/2.1/1.1 cores, DMA cores and drivers), Memory Interface Solution (HBM2, DDR4/3, LPDDR4/3, MRAM, RLDRAM 3), and MIPI Solution (CSI-2, DSI-2, DSI). These solutions support a full range of platforms including ASICs, Structured ASICs and FPGAs. For additional information, visit www.nwlogic.com.

About Sonics, Inc.
Sonics, Inc. (San Jose, Calif.) is the trusted leader in on-chip network (NoC) and power-management technologies used by the world’s top semiconductor and electronics product companies, including Broadcom®, Intel®, Marvell®, MediaTek, and Microchip®. Sonics was the first company to develop and commercialize NoCs, accelerating volume production of complex systems-on-chip (SoC) that contain multiple processor cores. Based on the ICE-Grain™ Power Architecture, Sonics’ ICE-G1™ is the industry’s first complete Energy Processing Unit (EPU), which enables rapid development of SoC power management subsystems. Sonics is also a catalyst for ongoing discussions about design methodology change via the Agile IC Methodology LinkedIn group. Sonics holds approximately 150 patent properties supporting customer products that have shipped more than four billion SoCs. For more information, visit sonicsinc.com, and follow us on Twitter (@sonicsinc) and LinkedIn.

Contacts:
Scott Seiden Sonics, Inc 760.271.1148 [email protected]	Steve Holte Northwest Logic 503-533-5800 [email protected]

White paper explains a real, working HBM/2.5D supply chain

San Jose, California — April 19, 2016 — SK hynix, Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems have co-authored a white paper discussing High Bandwidth Memory (HBM) designs implemented with 2.5D technology.

HBM is a JEDEC-defined standard that utilizes 2.5D technology to interconnect an SoC and an HBM memory stack. Many companies are already using HBM to create very high-bandwidth, low-power products. This white paper presents a complete HBM supply chain that is delivering and supporting customer HBM designs now.

This informative HBM design white paper, as well as a video of the companion webinar, is now available online.

About SK hynix.
SK hynix, headquartered in Korea, is the world’s top tier semiconductor supplier offering Dynamic Random Access Memory chips (“DRAM”), Flash memory chips (“NAND Flash”) and CMOS Image Sensors (“CIS”) for a wide range of distinguished customers globally. The Company’s shares are traded on the Korea Exchange, and the Global Depository shares are listed on the Luxemburg Stock Exchange. Further information about SK Hynix is available at www.skhynix.com.

About Amkor Technology Inc.
Amkor Technology is one of the world’s largest providers of semiconductor packaging and test services. Founded in 1968, Amkor pioneered the outsourcing of IC assembly and test and is now a strategic manufacturing partner for more than 250 of the world’s leading semiconductor companies, foundries and electronics OEMs. Amkor’s operational base encompasses more than 8 million square feet of floor space with production facilities, product development centers and sales & support offices located in key electronics manufacturing regions in Asia, Europe and the USA. For more information visit www.amkor.com. 

About eSilicon
eSilicon guides customers through a fast, accurate, transparent, low-risk ASIC journey, from concept to volume production. Explore your options online with eSilicon STAR tools, engage with eSilicon experts, and take advantage of eSilicon semiconductor design, custom IP and IC manufacturing solutions through a flexible engagement model. eSilicon serves a wide variety of markets including the communications, computer, consumer, industrial products and medical segments. Get the data, decision-making power and technology you need for first-time-right results. www.esilicon.com. The right chip. Right now™

About Northwest Logic
Northwest Logic, founded in 1995 and located in Beaverton, Oregon, provides high-performance, silicon-proven, easy-to-use IP cores including high-performance PCI Express solution (PCI Express 3.0, 2.1 and 1.1 cores and drivers), Memory Interface Solution (DDR4/3/2, LPDDR4/3/2 SDRAM; HBM, MRAM, RLDRAM 3/II), and MIPI Solution (CSI-2, DSI). These solutions support a full range of platforms including ASICs, Structured ASICs and FPGAs. For additional information, visit www.nwlogic.com or contact us directly.

About Avery Design Systems
Founded in 1999, Avery Design Systems, Inc. enables system and SOC design teams to achieve dramatic functional verification productivity improvements through the use of formal analysis applications for RT-level and gate-level X verification; robust core-through-chip-level Verification IP for PCI Express, USB, AMBA, UFS, MIPI, DDR/LPDDR, HBM, HMC, ONFI/Toggle, NVM Express, SCSI Express, SATA Express, eMMC, SD/SDIO, and CAN FD standards. The company is a member of the Mentor Graphics Value Added Partnership (VAP) program and has established numerous Avery Design VIP partner program affiliations with leading IP suppliers. More information about the company may be found at www.avery-design.com.

Contacts:
Kevin Tran SK hynix America. 408-232-8386 [email protected]	Debi Polo Amkor Technology, Inc. 480-786-7653 [email protected]	Sally Slemons eSilicon Corporation 408-635-6409 [email protected]
Brian Daellenbach Northwest Logic 503-533-5800 x309 [email protected]		Chris Browy Avery Design Systems 978-851-3627 [email protected]