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Delivered strong Q4 results with revenue and earnings at the high end of guidance Generated $54.8 million in cash from operations in Q4 Produced quarterly product revenue of $53.7 million driven by memory interface chips Launched industry’s first Gen4 DDR5 RCD for server memory modules SAN JOSE, Calif. – February 5, 2024 – Rambus Inc. […]
The Rambus PCI Express® (PCIe) 6.1 Controller with AXI is a configurable and scalable design for ASIC implementations. Download the brief to see the features and the technical specs.
The Rambus Compute Express Link (CXL) 3.1 Controller with AXI leverages a silicon-proven PCIe controller architecture for the CXL.io path, and adds CXL.cache and CXL.mem paths specific to the CXL standard. Download the brief to see the features and the specs.
The Rambus Compute Express Link (CXL) 3.1 Controller leverages a silicon-proven PCIe controller architecture for the CXL.io path, and adds CXL.cache and CXL.mem paths specific to the CXL standard. Download the brief to learn the features and the specs.
The AI boom is giving rise to profound changes in the data center; compute-intensive workloads are driving an unprecedented demand for low latency, high-bandwidth connectivity between CPUs, accelerators and storage. The Compute Express Link® (CXL®) interconnect offers new ways for data centers to enhance performance and efficiency. As data centers grapple with increasingly complex AI […]
The PCI Express® (PCIe®) interface is the critical backbone that moves data at high bandwidth and low latency between various compute nodes such as CPUs, GPUs, FPGAs, and workload-specific accelerators. With the torrid rise in bandwidth demands of advanced workloads such as AI/ML training, PCIe 6.1 jumps signaling to 64 GT/s with some of the […]
[Last updated on: January 23, 2024] In this blog post, we take an in-depth look at Compute Express Link®™ (CXL®™), an open standard cache-coherent interconnect between processors and accelerators, smart NICs, and memory devices. We explore how CXL can help data centers more efficiently handle the tremendous memory performance demands of generative AI and other advanced workloads. […]
[Updated January 23, 2024] The PCI Express® 6.0 (PCIe® 6.0) specification was released by PCI-SIG® in January 2022. This new generation of the ubiquitous PCIe standard brought with it many exciting new features designed to boost performance for compute-intensive workloads including data center, AI/ML and HPC applications. PCIe 6.0 has now evolved to version 6.1 of the standard. Find […]
The Rambus PCIe 6.1 Controller is configurable and scalable controller IP designed for ASIC implementation. Download the brief to learn about the features and the specs.
There is nothing like starting off the new year with some good news, and there have certainly been lots of exciting new certification developments for our silicon IP portfolio recently. Check out all our recent certification news below or head over to our Certifications page for a more detailed look at our many certified security […]